Personal-Reference-LinkPage: YoSys-FrontEnd-SymbiFlow-Tools

Source: SymbiFlow

Open source flow for generating bitstreams from Verilog.

The Internet

https://symbiflow.github.io

symbiflow@lists.librecores.org

Repositories 25 People 3

Projects 2

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Pinned repositories

ideas

Random ideas and interesting ideas for things we hope to eventually do.

23

2

prjxray

Documenting the Xilinx 7-series bit-stream format.

Python

273

35

prjxray-db

Project X-Ray Database: XC7 Series

Shell

23

3

symbiflow-arch-defs

FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.

Python

55

29

vtr-verilog-to-routing

Forked from verilog-to-routing/vtr-verilog-to-routing

SymbiFlow WIP changes for Verilog to Routing -- Open Source CAD Flow for FPGA Research

C

10

6

yosys

Forked from YosysHQ/yosys

SymbiFlow WIP changes for Yosys Open SYnthesis Suite

C++

8

6. 2

• prjxray-db

  Project X-Ray Database: XC7 Series

  toolchain bitset database tools fpga xilinx xilinx-fpga

Shell

3 23 0

0 Updated 12 hours ago

vtr-verilog-to-routing

Forked from verilog-to-routing/vtr-verilog-to-routing

SymbiFlow WIP changes for Verilog to Routing -- Open Source CAD Flow for FPGA Research

C

125 10 14

8 Updated 13 hours ago

symbiflow-arch-defs

FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.

python toolchain documentation fpga sphinx primitives verilog

Python

ISC 29 55 170 (25 issues need help)

26 Updated 13 hours ago

conda-packages

Forked from litex-hub/litex-conda

Conda build recipes for the toolchains needed by LiteX / MiSoC firmware

Shell

Apache-2.0 13 0 7

0 Updated 14 hours ago

prjxray

Documenting the Xilinx 7-series bit-stream format.

toolchain tools fpga xilinx vivado fuzzer xilinx-fpga

Python

ISC 35 273 79 (16 issues need help)

9 Updated 23 hours ago

yosys

Forked from YosysHQ/yosys

SymbiFlow WIP changes for Yosys Open SYnthesis Suite

C++

ISC 255 8 3 (1 issue needs help)

2 Updated 2 days ago

prjtrellis

Documenting the Lattice ECP5 bit-stream format.

Verilog

ISC 28 122 6

4 Updated 3 days ago

symbiflow.github.io

Published SymbiFlow Website

symbiflow

HTML

ISC 0 1 0

0 Updated 5 days ago

symbiflow-website

SymbiFlow Website Source

fpga xilinx lattice symbiflow

HTML

ISC 6 3 4

0 Updated 5 days ago

python-sdf-timing

Python library for working Standard Delay Format (SDF) Timing Annotation files.

Python

ISC 3 2 4

0 Updated 19 days ago

sphinx_symbiflow_theme

Forked from rtfd/sphinx_rtd_theme

Sphinx theme for SymbiFlow

CSS

1,111 1 0

0 Updated on May 8

nextpnr

Forked from YosysHQ/nextpnr

nextpnr portable FPGA place and route tool

C++

ISC 47 1 0

0 Updated on Apr 19

icestorm

Forked from cliffordwolf/icestorm

Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentaion (Reverse Engineered)

Python

ISC 117 5 0

0 Updated on Apr 19

symbiflow-docs

Documentation for SymbiFlow

Python

2 4 4

0 Updated on Apr 16

nixpkgs

Forked from NixOS/nixpkgs

Nix Packages collection

Nix

MIT 3,713 0 0

0 Updated on Apr 7

SymbiYosys

Forked from YosysHQ/SymbiYosys

SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows

Python

20 1 0

0 Updated on Apr 3

prjtrellis-db

Project Trellis database

1 2 0

0 Updated on Feb 28

.github

0 0 0

0 Updated on Feb 22

fasm

FPGA Assembly (FASM) Parser and Generator

fpga fasm bitstream fpga-assembly symbiflow

Python

ISC 3 3 8

0 Updated on Feb 7

prjxray-dev-env

Docker-based standardized development environment for prjxray

docker xilinx vivado

Dockerfile

ISC 1 1 0

0 Updated on Jan 9

fpga-tool-perf

FPGA tool performance profiling

fpga perf yosys vpr arachne-pnr

Verilog

ISC 1 1 8 (2 issues need help)

0 Updated on Nov 28, 2018

arachne-pnr Archived

Forked from YosysHQ/arachne-pnr

Place and route tool for FPGAs

C++

MIT 62 0 0

0 Updated on Aug 15, 2018

ideas

Random ideas and interesting ideas for things we hope to eventually do.

2 23 29 (9 issues need help)

0 Updated on Feb 26, 2018

scratchpad

This repository contains random experiments and other similar stuff which may go away at any time.

ISC 1 0 0

0 Updated on Jan 30, 2018

prjxray-experiments-archive-2017 Archived

These are experiments which we conducted in 2017 as part of Project X-Ray.

Verilog

ISC 0 1 0

• 0 Updated on Dec 30, 2017

Top languages

Python C++ Verilog Shell HTML

Most used topics

fpga xilinx symbiflow toolchain xilinx-fpga

3

People

cliffordwolf Clifford Wolf

daveshah1 David Shah

mithro Tim Ansell

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